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Hold-Up Capacitor Sizing

Bulk capacitance to ride through a dropout: C = 2·P·t / (V₁² − V₂²).

InputC = 2·P·t / (V₁² − V₂²) (from ½CV₁² − ½CV₂² = P·t)

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The engineering

A capacitor's energy rides on V², so the usable share depends brutally on how far down you can drink: from 390 V to 300 V you extract 41% of the stored joules, but a rail that must stay within 10% of nominal gives up only 19%. This is why hold-up caps live on the high-voltage bus of an off-line supply — volts squared are cheap real estate up there.

The classic spec is one lost AC cycle plus margin — ATX and much telecom gear demand ~17–20 ms of ride-through at full load. Then derate reality onto the math: electrolytics arrive −20% under tolerance, lose capacitance cold and over years, and the downstream converter's dropout sets V₂, not your optimism.

Where this math comes from

Stored charge started as a party trick: von Kleist (1745) and Musschenbroek at Leyden (1746) independently bottled electricity, and ½CV² joined the physics canon over the following century. For the rectifier age the bulk cap merely smoothed ripple — 'hold-up' as a specification had to wait for loads that died in milliseconds.

Switch-mode supplies and digital logic created that load, and the requirement was codified when Intel's ATX specification (1995) made ~17 ms of full-load hold-up a compliance line item — one mains cycle of grace, sized by exactly this card's equation, in every desktop PC since.

  1. 1745Ewald von Kleist / Pieter van MusschenbroekThe Leyden jar — capacitive energy storage.
  2. 1977Switch-mode power eraOff-line SMPS makes the HV bulk cap the energy reservoir, circa.
  3. 1995IntelATX spec writes ~17 ms hold-up into every PC supply.

See the full timeline of the math behind every calculator →

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