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SMPS Efficiency Chain

Cascade converter-stage efficiencies to get total efficiency, input power, and thermal loss.

Inputη_total = η₁ · η₂ · … · ηₙ , P_in = P_out / η_total , P_loss = P_in − P_out

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The engineering

A real supply is a chain: PFC front end, isolated DC-DC, maybe a point-of-load buck. Each stage passes only its own fraction of power, so total efficiency is the product of the stage efficiencies — not the average. Enter the load power and each stage's η and the card back-solves input draw and the heat you must remove.

The gotcha is multiplication: three 95% stages give 0.95³ = 85.7%, not 95%. Every point of efficiency lost downstream is amplified by the stages above it, which is why point-of-load conversion near the die is worth the silicon. The loss row is your heatsink budget — size the thermal path to that number, not the output.

Where this math comes from

Switching regulators grew out of 1950s–60s aerospace and computing power needs, where linear regulators wasted too much as heat. By pulsing a transistor fully on or off through an inductor, designers cut dissipation dramatically — but analyzing the tangle of ripple, ringing, and loss mechanisms stayed an art until the state-space averaging methods of the 1970s.

Robert Erickson and Dragan Maksimović's Fundamentals of Power Electronics (first edition 1997, Colorado) turned that art into a teachable discipline, with efficiency modeling that treats each conversion stage as a loss-bearing block. The cascade product rule this card uses is the practical shorthand engineers pull straight off that framework.

  1. 1976R. D. Middlebrook & S. ĆukPublish state-space averaging, making switching-converter loss analysis tractable.
  2. 1997R. Erickson & D. MaksimovićFundamentals of Power Electronics codifies stage-by-stage efficiency modeling.
  3. 200780 PLUS programStandardizes tiered efficiency ratings that force the cascade view of supply design.

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